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Post: #1

1. INTRODUCTION

Computer chips of today are synchronous. They contain a main clock, which controls the timing of the entire chips. There are problems, however, involved with these clocked designs that are common today.

One problem is speed. A chip can only work as fast as its slowest component. Therefore, if one part of the chip is especially slow, the other parts of the chip are forced to sit idle. This wasted computed time is obviously detrimental to the speed of the chip.

New problems with speeding up a clocked chip are just around the corner. Clock frequencies are getting so fast that signals can barely cross the chip in one clock cycle. When we get to the point where the clock cannot drive the entire chip, weâ„¢ll be forced to come up with a solution. One possible solution is a second clock, but this will incur overhead and power consumption, so this is a poor solution. It is also important to note that doubling the frequency of the clock does not double the chip speed, therefore blindly trying to increase chip speed by increasing frequency without considering other options is foolish.

The other major problem with c clocked design is power consumption. The clock consumes more power that any other component of the chip. The most disturbing thing about this is that the clock serves no direct computational use. A clock does not perform operations on information; it simply orchestrates the computational parts of the computer.

New problems with power consumption are arising. As the number of transistors on a chi increases, so does the power used by the clock. Therefore, as we design more complicated chips, power consumption becomes an even more crucial topic. Mobile electronics are the target for many chips.

These chips need to be even more conservative with power consumption in order to have a reasonable battery lifetime.

ABSTRACT

Breaking the bounds of the clock on a processor may seem a daunting task to those brought up through a typical engineering program. Without the clock, how do you organize the chip and know when you have the correct data or instruction? We may have to take this task on very soon.

Clock speeds are now on the gigahertz range and there is not much room for speedup before physical realities start to complicate things. With a gigahertz powering a chip, signals barely have enough time to make it across the chip before the next clock tick. At this point, speedup the clock frequency could become disastrous. This is when a chip that is not constricted by clock speed could become very valuable.

Interestingly, the idea of designing a computer processor without a central controlling clock is not a new one. In fact, this idea was suggested as early as 1946, but engineers felt that this asynchronous design would be too difficult to design with their current, and by todayâ„¢s standards, clumsy technology.

Today, we have the advanced manufacturing devices to make chips extremely accurate. Because of this, it is possible to create prototype processors without a clock. But will these chips catch on? A major hindrance to the development of clock less chips is the competitiveness of the computer industry. Presently, it is nearly impossible for companies to develop and manufacture a clock less chip while keeping the cost reasonable. Until this is possible, clock less chips will not be a major player in the market.

Post: #2
to get information about the topic asynchronous chips full report ,ppt and related topic refer the link bellow

http://www.seminarprojects.org/t-asynchr...ull-report

http://www.seminarprojects.org/t-asynchr...hips--5393

http://www.seminarprojects.org/t-asynchronous-chips
Post: #3
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