The configuration of the Arithmetic Logic Unit has effect on the computation efficiency of the executing programs . It is a fact that a given hardware ALU configuration may be better suited for execution of a given computation structure . Thus maximum computation efficiency can be achieved if the underlying hardware configuration can be adjusted as required by the program structure . Since a program is sequence of algorithmic steps with varying computation structure , the need for such a reconfiguration i.e , changing from one ALU configuration to another , would thus arise at different program points corresponding to these steps .
The problem of identifying the optimal configurations that match the needs of the underlying computation at different steps in program is very complex . But if such configurable computing engines can be designed then power of these architectures can be maximally used . The success of these architectures critically depends on the effectiveness of the compiler to suitably configure the hardware to the computation needs .
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