DESIGN AND IMPLEMENTATION OF RADIX-4 BOOTH MULTIPLIER USING VHDL
Multiplier is a digital circuit to perform rapid multiplication of two numbers in binary representation. A systemâ„¢s performance is generally determined by the performance of the multiplier because the multiplier is generally the slowest element in the system. Furthermore, it is generally the most area consuming. Hence, optimizing the speed and area of the multiplier is a major design issue.
Radix 2^n multipliers which operate on digits in a parallel fashion instead of bits and hence avoid most of the above problems. They were introduced by M. K. Ibrahim in 1993. These structures are iterative and modular.
Srujita Padmini Das
Puspita Kumari Parida
A Binary multiplier is an electronic hardware device used in digital electronics or a computer or other electronic device to perform rapid multiplication of two numbers in binary representation. It is built using binary adders.
The rules for binary multiplication can be stated as follows
If the multiplier digit is a 1, the multiplicand is simply copied down and represents the product.
If the multiplier digit is a 0 the product is also 0.
For designing a multiplier circuit we should have circuitry to provide or do the following four things:
It should be capable identifying whether a bit is 0 or 1.
It should be capable of shifting left partial products.
It should be able to add all the partial products to give the products as sum of partial products.
It should examine the sign bits. If they are alike, the sign of the product will be a positive, if the sign bits are opposite product will be negative. The sign bit of the product stored with above criteria should be displayed along with the product.
From the above discussion we observe that it is not necessary to wait until all the partial products have been formed before summing them. In fact the addition of partial product can be carried out as soon as the partial product is formed.
Booth multiplication is a technique that allows for smaller, faster multiplication circuits, by recoding the numbers that are multiplied. It is the standard technique used in chip design, and provides significant improvements over the "long multiplication" technique. One of the solutions of realizing high speed multipliers is to enhance parallelism which helps to decrease the number of subsequent calculation stages.
The decision to use a Radix-4 modified Booth algorithm rather than Radix-2 Booth algorithm is that in Radix-4, the number of partial products is reduced to n/2.