SYSTEM DESIGN USING PLL
Abstract:- This paper describes the novel structure of a phase locked loop, which is used in all designs to generate internal clock at a specified frequency. A phase-locked loop circuit responds to both the frequency and the phase of the input signals, automatically raising or lowering the frequency of a controlled oscillator until it is matched to the reference in both frequency and phase. A phase-locked loop is an example of a control system using negative feedback. A PLL compares the frequencies of two signals and produces an error signal which is proportional to the difference between the input frequencies.